In a static random access memory (SRAM) circuit, two bit lines are coupled with a memory cell, and each bit line corresponds to a write mux transistor. In a read operation, the two write mux transistors are turned off, but draw some leakage current. Further, a sense amplifier is used to sense a bit line split of the two bit lines that reflects the data read from the memory cell. In some existing approaches, during a read operation, the data difference at each of the write mux transistors increases the effective offset of the sense amplifier and causes the sense amplifier to take a longer time to provide a sensed result.
Like reference symbols in the various drawings indicate like elements.